Multiprocessor systems employing common memory for the transfer of information between processors are known. For example, in British Pat. No. 2,112,146 a system is disclosed in which information is transferred in response to interrupts. In an article by R. J. Bowater, et al in the IBM technical disclosure bulletin Volumn 22, No. 11, of April, 1980, a system is disclosed in which areas of memory are scanned in order to locate information which is to be transferred.
To ensure satisfactory operation of the above systems, while making efficient use of the common bus, contention for the bus must be resolved to ensure that all processors have access to the common memory. The rate at which each transfer is performed (for a given clock frequency) is determined by the number of instructions required to perform the transfer. It is therefore an object of the present invention to provide an improved multiprocessor system which provides fast information transfer while allowing each processor to have access to the common bus.